The present invention relates generally to a contact for a field-effect transistor (FET), and more particularly, but not by way of limitation, to a contact that uses the vertical dimension between gates and above sources and drains to increase contact area and thus decrease external resistance of a FET and method of manufacture thereof.
As device scaling progresses and devices are fit into an increasingly tight pitch to increase density, the available area for contacting the active device shrinks and this leads to an increase in the device contact resistance, which is deleterious since the intrinsic device resistance is decreasing, by design, in order to improve performance.